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UVM
uvm验证方法学入门。step by step,适合IC验证人员入门(uvm verification methodology started. step by step, for IC verification personnel entry)
- 2015-04-05 23:14:20下载
- 积分:1
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用于fpga学习,共同分享学习经验和交流学习心得
用于fpga学习,共同分享学习经验和交流学习心得-For fpga to learn, to share learning experiences and the exchange of learning
- 2022-02-25 22:21:38下载
- 积分:1
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"Verilog HDL Design Guide" 4
《Verilog HDL 程序设计教程》4-"Verilog HDL Design Guide" 4
- 2023-06-21 01:20:03下载
- 积分:1
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dvb_s2_ldpc_decoder_latest.tar
LDPC COded OFDM System
- 2013-02-09 21:41:33下载
- 积分:1
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这是一个基本的ARM7_Core
有基本功能 但不是太完善
这是一个基本的ARM7_Core
有基本功能 但不是太完善-This is a basic ARM7_Core has the basic functions, but not too perfect
- 2022-01-26 06:35:06下载
- 积分:1
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urisc
自己用verilog编写的urisc程序,调试成功,压缩包里有仿真图像,值得学习参考。(Written in verilog urisc program debugging, simulation image compression bag, worth learning reference.)
- 2021-04-22 17:38:48下载
- 积分:1
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256M_sdram_OK
改自特权同学verilog语言写sdram测试程序;支持256M内存(verilog sdram )
- 2013-12-23 16:15:43下载
- 积分:1
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dianyuan
saber的仿真模型,是一个电源的,经过调试已经成功(The simulation model of the saber, is a power, after commissioning has been successfully)
- 2012-04-06 12:17:23下载
- 积分:1
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banjian
完成一个1位全减器的设计。以全减器为元件程序完成8位减法器设计。(Completed a one minus the whole design. Full reduction is to complete eight subtraction element program design.)
- 2015-06-26 21:17:49下载
- 积分:1
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VHDL.Programming
这是这本书的第四个版本,现在这个版本不仅提供了VHDL语言的覆盖面,但设计方法的信息,以及。此版本将指导读者通过创建一个VHDL设计的过程中,模拟设计,综合设计,放置和布线设计,使用的重要模拟验证的最终结果,新的技术,称为全速调试,提供了极其快速设计验证。在这个版本的设计,例如已被更新(This is the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extremely fast design verification. The design example in this version has been updated to reflect.)
- 2012-04-08 19:36:36下载
- 积分:1