"Verilog HDL Design Guide" 4

数字滤波器组。包含matlab程序和word说明。通过一个低通数字滤波器和多个带通数字滤波器组合成一个滤波器组(Groups of the digital filter. Contains matlab program and word description. Through the combination of a low pass digital filter, and a plurality of band-pass digital filter into a filter bank)

一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序(A RS232 computer interface implementation with FPGA-based VHDL language communications designed a very simple procedure)

FPGA按键延时模块，产生key_value和key_flag 可直接例化调用(The key delay module of FPGA)

高频卡读写原理及技术编程应用--卡的读取，写入。(High-frequency card reader technology)

RAM控制的VHDL实现 真的很有用 -VHDL implementation of the RAM control true true useful useful

自己编的一个分频器的程序模版 虽然原理很简单，经过多次实践很实用 被多次用在其它的程序中-own series of the dividers of a procedure template Although very simple principle, after repeated practice by many very practical use in other proceedings, and,

GW48系统电子琴：可控制8个音节，4种音调 readme中带使用说明-GW48 system : control eight syllables, four species of taking the pitch readme use

mpeg-2 crcr32计算的代码，采用verilog编写，验证通过(mpeg-2 crcr32 caculate)

基于FPGA的实现小数倍分频代码，广泛应用于数字通信中。-FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.

用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.