基于ALtera公司的若干款FPGA的调试经验，对初学者有重要价值

基于CPLD的签到器的设计，用三维数组队人名进行储存-Based on the attendance CPLD design, a few team names with three-dimensional storage

实现时分秒的计数和校正实现时分秒的计数和校正(Realized and correction of minutes and seconds count)

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)

增强型8051的VHDL源代码，两个周期执行一条指令，仿真工具为Modelsim，开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 development board

这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家-This is a keyboard based on the VHDL programming language source code program, the desire to help everyone

thesis for simple virus detection processor which is developed in xilinx

异步FIFO 设计源代码，内涵完整的verilog源代码和测试代码。-Source code for asyn_fifo using verilog language.

RS 编码和解码Verilog Code, 实现了RS（204,188)的编码和译码；(RS Coding and Decoding Verilog code，　implement RS（204,188) )

Verilog HDL 读取EEPROM项目的详细构建(Verilog HDL EEPROM read the detailed construction)

Demo 使用 PmodHMT 模块实时检测环境温度和湿度。(The Demo uses PmodHMT modules to detect environmental temperature and humidity in real time.)