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VGA显示驱动程序编写的Verilog HDL
用Verilog HDL编写的VGA显示驱动程序-Verilog HDL prepared with VGA display driver
- 2022-03-19 09:42:23下载
- 积分：1
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xapp1026
XILINX中LWIP协议例子应用指南，有实际例子(Examples of applications in LWIP agreement XILINX Guide, a practical example)
- 2020-10-13 22:07:32下载
- 积分：1
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DDR_SDRAM_verilog
说明： DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的(DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good)
- 2021-03-13 16:39:24下载
- 积分：1
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Some_classic_examples_of_VHDL_language_source_code
ＶＨＤＬ语言的一些经典实例源代码，包括状态机，时序电路，组合逻辑电路等(Some classic examples of VHDL language source code, including the state machine, sequential circuits, combinational logic circuits)
- 2010-07-11 12:50:06下载
- 积分：1
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FPGA-DSP
vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信(vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP)
- 2021-01-08 10:58:51下载
- 积分：1
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Combined unit GPS clock synchronization detection unit merger GPS synchronized c...
合并单元内GPS同步时钟的检测
合并单元内GPS同步时钟的检测-Combined unit GPS clock synchronization detection unit merger GPS synchronized clock detection
- 2023-05-04 14:30:04下载
- 积分：1
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verilog-montgomery-RSA
基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file)
- 2021-04-27 20:28:44下载
- 积分：1
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verilog支持noise噪声的端口port
verilog支持noise噪声的端口port, 可以用于仿真运行.
评估噪声影响
Verilog port that supports noise and can be used for simulation run.
Evaluate noise effects
- 2022-07-25 10:35:21下载
- 积分：1
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rough22
采用倍频及1/3、1/12倍频绘制的路面不平度频谱图（自编）(Using octave and 1/3, 1/12 octave drawn road roughness spectrum (self))
- 2013-09-10 16:50:13下载
- 积分：1
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descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve...
cm12864液晶显示器的vhdl驱动代码，基于状态机的转换，实现显示功能。-descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve the display function.
- 2022-12-01 22:05:03下载
- 积分：1
