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cpld 控制 8
cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
- 2022-02-20 19:59:10下载
- 积分:1
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20190718 - Copy
说明: this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device
- 2020-06-21 21:20:02下载
- 积分:1
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i2c
本文研究的IIC总线控制器具有如下特征
1.兼容飞利浦I2C标准,以主机模式与外围设备进行数据通信,对IIC从机模型进行读/读,读/写,写/写,写/读[18]。
2.多主操作
3.软件可编程时钟频率
4.时钟拉伸和等待状态生成
5.软件可编程确认位
6.时钟同步设计
7.仲裁中断丢失,自动转移取消
8.开始/停止/重复启动检测/确认生成
9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics.
1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18].
2. Multiple Main Operations
3. Software programmable clock frequency
4. Clock stretching and waiting state generation
5. Software Programmable Confirmation Bit
6. Clock Synchronization Design
7. Loss of arbitration interruption and cancellation of automatic transfer
8. Start/Stop/Repeat Start Detection/Verification Generation
9. Bus busy detection)
- 2019-06-18 12:18:10下载
- 积分:1
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dac8568
Verilog 语言写的控制 DAC8568 的模块,DAC8568 是SPI接口。(Verilog language used to write the control module DAC8568, DAC8568 is SPI interface.)
- 2015-10-30 18:02:04下载
- 积分:1
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FPGA_trainning2013A
在EDA实验课上面,自己编写的NCO程序,可以产生出比较真实的正弦波、三角波以及锯齿波,用VHDL程序编写,有modelsim仿真textbench程序(On EDA experiment, oneself write the NCO program, can produce more real sine wave, triangular wave and sawtooth wave with VHDL programming, have the modelsim simulation textbench program
)
- 2013-07-16 15:05:28下载
- 积分:1
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用VHDL写的交通灯控制源码,原创,希望对大家有所帮助
用VHDL写的交通灯控制源码,原创,希望对大家有所帮助-Use VHDL to write a traffic signal-controlled source, originality, and they hope to help everyone
- 2022-12-31 00:45:12下载
- 积分:1
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一个4×4矩阵键盘接口程序的Verilog设计(FPGA)
一个4*4矩阵键盘的VERILOG接口程序设计(FPGA)-A 4* 4 matrix keyboard interface program Verilog Design (FPGA)
- 2022-07-24 14:37:13下载
- 积分:1
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fpga_debounce_filter
fpga debounce filter code in vhdl
- 2009-10-02 18:48:22下载
- 积分:1
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Verilog实现 spi接口的FPGA实现 通过仿真,修改后即可应用
Verilog实现 spi接口的FPGA实现 通过仿真,修改后即可应用-Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified
- 2022-08-14 13:03:16下载
- 积分:1
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数码管时钟
利用8段数码管实现的秒表时钟,FPGA使用EP2C80208C8N,通过例化数码管控制模块、秒表计时模块、时钟进位模块等实现准确计时。
- 2022-03-13 13:33:27下载
- 积分:1