这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着...

verilog测试，fpga测试片外sramis61lv25616，256个k个字，16位，比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)

Verilog编写的简单异步串口 完全原创，站长请查看内容-Verilog prepared by the simple asynchronous serial completely original, the station can be accessed content

说明：  APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)

ADD MOV MOVi SUB四指令cpu设计，qutartus，(Design of four-instruction CPU)

使用VHDL实现锁相环,是个学习VHDL的好例子,与众分享-PLL using VHDL, VHDL is learning a good example, sharing with the public

清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，音乐计算器，完成两个三位数的运算，有注释，很强大！！(Verilog, QuartusII run correctly, can be downloaded to the FPGA, music, calculator, completed two three-digit operations, there are notes, very powerful! !)

基于verilog的1588V2协议的fpga实现，目前项目通用代码，供大家参考(Based on verilog 1588 v2 fpga implementation of the agreement, the project general code, for your reference)

WM8731芯片的音效处理verilog代码， WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)

FPGA实现基于cordic算法的指数函数的程序(FPGA implementation of an exponential function program based on the cordic algorithm)

特权同学主讲的FPGA设计的时序约束专题（STA部分）(Speaker privileged classmates timing constraints for FPGA design topics (STA section))