Verilog实现 spi接口的FPGA实现 通过仿真，修改后即可应用

说明：  AES TSAPI Retrieve Event in Non-blocking Mode

基于cycloneIIFPGA芯片Ep2c5t144c8的解调程序，用VHDL语言生成-CycloneIIFPGA chip-based demodulation Ep2c5t144c8 procedures, using VHDL language generation

说明：  Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA. Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit! The UART controller was simulated and tested in hardware.

LDPC QC-LDPC 基于FPGA的QC-LDPC实现 论文(LDPC QC-LDPC FPGA-based QC-LDPC detailed implementation steps Thesis)

vga很好的学习材料，测试程序，欢迎下载(vga good learning materials, testing procedures, please download)

FPGA控制SRAM读写时序源码，代码桂发，新手一看就懂(FPGA control SRAM write timing source code Guifa novice understand at a glance)

it contains pdf file which has vhdl program of uart (universal asynchoronus receiver and transmitter). which very simple and easy to understand

利用最新的嵌入式开发工具EDK，在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程，从而在FPGA 中实现U S B 控制器， 并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。(Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.)

说明：  关于计时器 verilog语言，采用arm架构的m3，可以直接应用于soc(About timer verilog language, USES the arm architecture of m3, can be directly applied to soc)

一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)