用vhdl语言 来实现 四位并行加法器的功能 是本科生的必学内容...

这是一个I2C接口的VHDL实现模块，实现I2C协议-This is a realization of I2C interface VHDL module, I2C protocol to achieve

led 发送卡代码(led send card verilog)

如果不考虑占空比，直接利用计数器来进行分频，则占空比会发生变化。下面程序实现1：1的三分频。-if not duty cycle directly counter to the use of sub-frequency, duty cycle will change. Below a program : a third of the frequency.

Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear

测量周期,此程序已经在EP2C板子上成功实现(mesure cycle)

Dynamic Power Management for the Iterative Decoding of Turbo Codes

this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .

使用两个8点FFT完成64-point FFT(64-point FFT)

xilinx公司提供的关于FPGA硬件设计的额时序约束参考资料-xilinx provided on the FPGA hardware design timing constraints of the amount of reference material

对赛灵思7系列的三种型号的FPGA进行了综述(xilinx 7 productin overview)