用vhdl语言 来实现 四位并行加法器的功能 是本科生的必学内容...

数字时钟，可以实现(1) 显示日期功能（年、月、日、时、分、秒以及） (2) 可通过按键切换年、月、日及时、分、秒的显示状态 (3) 可随时调校年、月、日或时、分、秒 (4) 可每次增减一进行时间调节 (5) 可动态完整显示年份，实现真正的万年历显示 (6) 可显示温度 (Digital clock, can be achieved (1) the date function (year, month, day, hour, minute, seconds as well) (2) through the key switch the year, month, day in a timely manner, minute, second display state (3) at any time adjust the year, month, day or time, minutes, seconds (4) can be added or deleted, a time adjustment (5) can be dynamically complete display Year, the real calendar display (6) to display temperature)

sram 6bit仿真模型，verilog编写(sram 6bit simulation model, verilog prepared)

encoder using else if statement

用于altera公司DE2开发板上SD_Card_Audio的实例-DE2 development company for the altera board SD_Card_Audio examples

示波器的源码,基于串行口的,(oscilloscope source code, based on the serial port,)

ARM教程,理解精辟，言简意赅，不错哦，欢迎大家看看(arm language )

基于matlab和vhdl的通信原理gmsk调制算法，主要包括GMSK相位路径的计算,GMSK眼图的仿真以验证相位计算的正确性,正余弦表的量化及bin文件的生成,以及用VHDL硬件语言所描述的基于EPM7128的地址逻辑.(Matlab and vhdl based on the principle gmsk Modulation of communication, including GMSK phase path calculation, GMSK eye diagrams of the simulation to verify the correctness of the phase calculation, is the cosine table generating quantitative and bin files, and using VHDL hardware description language logic based on the address of EPM7128.)

一个VEILOG HDL程序，可以直接应用，-A VEILOG HDL procedures, can be applied directly,

利用LPM_MUIT宏模块设计一个四位数据乘法器(Use LPM_MUIT macro module design a four data Multiplier)

具有多种功能的电子钟：闹钟，报时和修改，定时闹钟，报时时间，带闹钟，报时开关。-with multiple functions of electronic bell : alarm clock, timer and modification, regular alarm clock, timer, with alarm clock, timer switches.