关于FFT算法的FPGA实现（源码），数字信号处理不可少。

此代码是用于旋转一个步进电机所需的方向。

用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control

It s Flicker_LED code.Verilog for MaxV.

液晶的控制，有VHDL语言实现-lcd control

verilog motor control

实现基于NIOS的 EP3C16与加速度传感器NMA7455的IIC基本通信(Realization of based on NIOS EP3C16 and acceleration sensor NMA7455 IIC of basic communication )

Cirrus Logic EP9302 原理图 ORCAD格式-Cirrus Logic EP9302 schematic ORCAD format

本源码为Nios II的开发示例,主要演示Nios II的定时中断器的应用。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II interrupt timing device applications. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.

说明：  基于蜂鸟E203riscv系统的DMA外设代码(DMA code based on hbird_e203 system)

最大最小值寻找程序，可以实现自动查找最大值与最小值(min_max_finder)