我用verilog hdl写的tft lcd屏的控制程序，用来点亮屏上的任意点...

流水线设计是高速电路设计中的一个常用设计手段。如果某个设计的处理流程分为若干步骤，而且整个数据处理是“单流向”的，即没有反馈或者迭代运算，前一个步骤的输出是下一个步骤的输入，则可以考虑采用流水线设计方法来提高系统的工作频率。-see up

SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps

典型事例，从网上down的，希望对大家有用，-Typical examples, from the Internet down, and I hope useful for everyone,

说明：  stepper motor module on spartan 6 and 24MHz clock fequency

整理的网上关于LCD12864(ST7920控制器）的串并口程序，已在stc89c52rd+11.0592MHz的情况下测试通过(Finishing line on LCD12864 (ST7920 controller) serial and parallel programs, in the case of stc89c52rd+11.0592 MHz test)

针对传统CPM正交扩频系统实现复杂度高的问题，提出了一种基于预编码的CPM正交扩频系统。(Pre—encoded CPM orthogonal spread spectrum system)

CAN总线的数据采集，FPGA到USB。verilog hdl语言。(CAN bus data acquisition, FPGA to the USB. verilog hdl language.)

实现QPSK系统的调制解调仿真，基带成形滤波器采用升余弦滚降滤波器，将仿真的误码率与理论误码率作了比较(Implement QPSK modulation and demodulation simulation system, the baseband shaping filter using Raised Cosine filter will BER simulation were compared with the theoretical BER)

基于vhdl的PWM发生器-VHDL-based PWM generator

用以VGA显示的小程序，很实用，挺有价值的(VGA display for a small program, very practical, quite valuable)