Toplevel VHDL Structural model of a system containing 8051

一个简单的UART串口程序，能实现数据的发送与接收，但没有奇偶校验等验证数据传输是否正确。(A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.)

反应速度测试小游戏，最小外设cpld游戏，带设计说明书(Reaction speed test games, the minimum peripheral cpld game, with design specifications)

stm32与fpga之间的通信，协议是SPI的，可双向通信（双向通信需要自己例化，只例化了fpga到stm32）(Communication between STM32 and FPGA, the protocol is SPI, two-way communication (two-way communication needs to be taken as an example, only FPGA to STM32))

说明：  A low pass filter module based on FPGA, easy to transplant

利用FPGA实现与powerpc的localbus数据接口代码。用verilog实现(localbus interface with PowerPC using Verilog)

lzrw1算法,VHDL语言，不带TB。模块验证，自己写TB文件

基于FPGA的实现小数倍分频代码，广泛应用于数字通信中。-FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.

说明：  一个8位RiSC单片机的VHDL代码， 具有很好的参考价值。(an eight RiSC SCM VHDL code, is a good reference value.)

ldpc编码器ru算法的verilog语言的完整实现，希望对您有用(ldpc encoder, RU, VERILOG，altera)

有限状态机工作原理、设计方法、步骤等精要说明(Finite state machine working principle, design method, such as Essentials of steps to explain)