VGA基础彩条测试实验

说明：  uvm lab代码以及uvm1.2源码，带有使用说明文档，可以照着文档一步一步深入了解uvm代码。(The code of UVM lab and the source code of uvm1.2 are provided with instruction documents. You can follow the documents step by step to understand the UVM code.)

SoC-Wishbone System IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。(SoC-Wishbone System IP core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)

verilog 语言写的FPGA内部实现硬件浮点乘法器的源码，两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)

说明：  此程序为调试通过的程序，带有I2C总线功能的程序.(this procedure through the debugging process, with I2C bus function procedures.)

FPGA实现SPI接口的从机功能，接收和发送全双工运行，接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)

matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)

也是网络上面下载的，个人感觉写的不错，已经用于商业代码中：des加密算法的vhdl和verilog源程序 

说明：  AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream

verilog source code for SD card SLAVE DEVICE IP-Core

led大显示屏发送卡代码，非常珍贵的，大家多多下载，和CODEFORGE网站共同发展，谢谢这个网站，这么多资源，对软件工程师真的是非常有用，再次感谢