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基于fpga的交织编码器设计，主要讲叙如何在fpga上实现交织编码器。-something about turbo。

实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)

FPGA测序和DDS产生各种波形程序，用Atral器件开发(FPGA sequencing and DDS generate various waveform programs.)

Program to implement convolution through VHDL-Program to implement convolution through VHDL...

ppm调制的verilog代码 可实现ppm调制(ppm modulation verilog code ppm modulation)

ofdm_cp_insertion add/remove CP

NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.

4-16译码器，用VHDL编写的，可以直接下载到可编程逻辑器件中(4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device)

基于verilog convolutional coding 的卷积编码(verilog convolutional coding )

采用FPGA 来实现一个基于OFDM 技术 的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制 器包括：信道编码（Reed-Solomon 编码），交织，星座映射，FFT 和插 入循环前缀等模块。(FPGA to implement a baseband data based on OFDM technology in the communication system processing section, namely modem. Transmitter modulator includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and insert the cyclic prefix modules.)