一个完整的

VHDL经典教程,下了不会后悔-VHDL Tutorial classic, the next will not regret it

通过CPLD将8位并行数据转换为串行数据并可以采用I2C方式与其他器件连接，可以用于MCU需要与提供I2C接口器件通信的场合。-through CPLD to eight parallel data into serial data and methods can be used I2C connections with other devices, which can be used to provide MCU with I2C Interface Communications occasions.

已经正式出版，西安电子科技大学出版社，FPGA设计及应用，作者褚振勇(Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong)

ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，然后NIOS　SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling

数字信号处理的FPGA实现(第4版)的配套源码，极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)

说明：  用VERILOG编写的一个可以实现VGA显示的程序.....(Prepared using a VERILOG VGA display program can .....)

一个视频信号输入的verilog源代码，里面含有相关的使用文档。-A video signal input of the Verilog source code, which contains documents related to the use.

FPGA实现串口发送 Verilog 语言(Serial reception FPGA Verilog language.)

这本书介绍了数字应用的底层电路设计的理论及实验程序，非常有用，是一本很好的工具书。(This book describes the application of the underlying digital circuit design theory and experimental procedures, very useful, is a good tool.)

GPS接收机相关器中关于积分清零模块、历元计数模块、时钟模块、以及整个相关器(accumulator、epoch counter、time base、gps baseband)