这是spi接口传输的一部分内容，本源码一共三部分，功能：spi接口的的实现即对外设的读写数据...

vhdl code for multiplexer and detemines how multiplexer works

turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)

system gen & accel dsp 培训资料-system gen & accel dsp

vhdl的一个串行序列信号发生器的设计与实现-vhdl sequence of a Serial Signal Generator Design and Implementation

通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)

采用Verilog HDL设计,在掌宇智能开发板上得到实现 根据抢答器的原理，整个电路可划分为三部分：采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on the palm space intelligence development board to snatch the answering principle, the entire electric circuit may divide is three parts: The sampling electric circuit, the gate control the electric circuit and the decoding circuit

用vhdl语言描写的存储器的读写，通俗易懂，简单实用。-Using VHDL language description of the memory read and write, user-friendly, simple and practical.

Program for Code Gerneration

利用IIC接口的4路 ADC max1037，采集思路信号，通过在FPGA内部的构建DeltaSigma DAC软核，在VGA液晶显示屏上显示波形。 (IIC interface 4-way ADC max1037, collecting ideas signal the FPGA internal build DeltaSigma DAC soft-core VGA LCD display waveforms.)

VCS详细学习资料。内涵专业研究院所内部培训资料。适合于初学者学习使用，易于上手。(VCS learning)