第7章数字系统设计实例 7.1 半整数分频器的设计 7.2 音乐发生器 7.3 2FSK/2PSK信号产生器 7.4 实用多功能电子表 7....

 本程序应用VHDL硬件描述语言，以QuartusⅡ8.0为开发工具设计了一个具有自动演奏乐曲功能的系统，演奏乐曲为《梁祝》，具有单曲播放器功能。本程序简单易懂，可作为FPGA入门学习之用。

TEXIO study testbench passed VHDL FPGA CPLD simulation Altera quartus

用VHDL语言编写的一个控制程序，主要功能是输入码同步，输出字和帧信号-VHDL language using a control program, the main function is to input code synchronization, and frame signals output word

基于单片机与CPLD的 等精度频率计，VHDL语言-Based on SCM and CPLD

this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural

基于QuartusII环境下以模块化的形式做成的视频复合同步信号。-QuartusII-based environment to create the form of modular composite video sync signal.

this program performs multiplexing and demultiplexing

调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。(FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and demodulation, QPSK modulation and demodulation, PPM modulation and demodulation verilog source code .)

长帧同步时钟的产生， 源码程序，实验好用(Long frame synchronization clock generation, source program, easy to use experimental)

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices.