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AHB_to_Wishbone_Verilog
说明: 该源代码包是AHB总线到Wishbone总线的交接器,包括以下4个部分:RTL源代码,测试平台,软件测试程序,说明文档。(This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.)
- 2021-01-22 14:48:40下载
- 积分:1
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Chip_74HC595
用Verilog描述了一款简单逻辑芯片74HC595的功能该芯片功能为:带输出锁存的8位移位寄存器(use the verilog to describe a simple chip 74HC595 with 8-Bit Serial-In, Parallel-Out Shift Reg and High-Current 3-State Outputs Reg)
- 2020-11-29 21:49:29下载
- 积分:1
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VHDL_freerisc8
说明: 一个8位RiSC单片机的VHDL代码,
具有很好的参考价值。(an eight RiSC SCM VHDL code, is a good reference value.)
- 2006-02-15 10:58:14下载
- 积分:1
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学习Xilinx公司开发软件ISE的基础资料,从最基础到复杂逻辑设计。
学习Xilinx公司开发软件ISE的基础资料,从最基础到复杂逻辑设计。-Learning Xilinx software ISE developed the basis of information from the most basic to complex logic design.
- 2022-05-27 10:26:09下载
- 积分:1
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跑马灯
跑马灯-是移位寄存器 有6个灯,无延时entity-Bomadeng-shift register is a six lights, without delay entity
- 2022-09-29 01:55:03下载
- 积分:1
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串并转换程序,由串行输出转换为4位的并行输出
串并转换程序,由串行输出转换为4位的并行输出-String and the conversion process, from the serial output is converted to 4-bit parallel output
- 2022-04-12 06:17:43下载
- 积分:1
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CPU
不同方法实现的CPU系统。同样支持加减乘,逻辑/算术移位,与或非等建议指令。(Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.)
- 2016-04-16 20:30:51下载
- 积分:1
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Chapter06
cvery high compatibles for quartus
- 2010-06-10 11:39:28下载
- 积分:1
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BCHencodeanddecode
bch 编码和译码,用硬件语言vhdl实现(bch edcode and decoder)
- 2020-06-28 18:00:01下载
- 积分:1
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concurrent
VHDL operators basics
- 2013-09-10 14:44:51下载
- 积分:1