ROM的4位的话。

《编写VHDL测试概述》的英文原版讲述了如何使用VHDL写测试凳程序("Writing VHDL test overview" of the English original to write about how to use VHDL test bench program)

交通灯的ＶＥＲＩＬＯＧ实现，含详细中文注释．-Verilog realize traffic lights, with detailed notes in Chinese.

数字时钟，可以实现(1) 显示日期功能（年、月、日、时、分、秒以及） (2) 可通过按键切换年、月、日及时、分、秒的显示状态 (3) 可随时调校年、月、日或时、分、秒 (4) 可每次增减一进行时间调节 (5) 可动态完整显示年份，实现真正的万年历显示 (6) 可显示温度 (Digital clock, can be achieved (1) the date function (year, month, day, hour, minute, seconds as well) (2) through the key switch the year, month, day in a timely manner, minute, second display state (3) at any time adjust the year, month, day or time, minutes, seconds (4) can be added or deleted, a time adjustment (5) can be dynamically complete display Year, the real calendar display (6) to display temperature)

彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)

VHDL Programmes -2 for dumping on FPGA

此程序为Verilog控制ADC的全部程序，已检验可以应用-This procedure for the Verilog control ADC all procedures can be applied to test

说明：  NCO生成原理接介绍、CORDIC算法原理介绍以及MATLAB与Verilog语言实现(Introduction to NCO generation principle)

Farrow 滤波器设计经典文章，作者是：FM.Gardner，farrow滤波器设计的始祖，经典值得推荐！（两篇文章）(Farrow filter design classic article, the author is: FM.Gardner, farrow filter design ancestor, classic worth recommending! (Two articles))

给FPGA程序，使之产生信号，驱动AD7606读取数据，并行模式。(give FPGA signal to read AD7606)

EDA常用双LED显示译码程序，将四位二进制数译码为七位对应于LED7位输入的高低电平信号-EDA common dual LED display decoding procedure will be four binary decoding for seven LED7 spaces corresponding to the input signal circuits