印制线路板设计经验点滴

Matlab to hdl code for Least_square testbench

this Code is in verilog HDL. This Code is for piplined processor with 4 opcode. this will work in three cycle latch, decode and exicute.. test bench for xilinx ise is laos given

VGA显示FPGA实现的VHDL语言的贪吃蛇游戏设计 本设计分为6个模块主要是扫描模块 VGA现实和控制模块 游戏设计的模块 电源模块等 用QUARTUS2仿真运行(VGA display FPGA VHDL language to realize the Snake game design The design is divided into six modules mainly scanning module VGA module power module and control module reality game design, etc. Simulation run with QUARTUS2)

说明：  用于FPGA的I2S接收模块，仅供学习和参考(audio-i2s receive.use fpga.)

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)

可以获取各种字符，并在数码管显示出来，非常的靠谱且稳定(Various characters can be acquired and displayed on the digital tube.)

xilinx 开发板程序，VGA控制显示-Xilinx development board procedures, VGA display control

说明：  一种基于FPGA的调频连续波方位向多通道 FMCW SAR的实时成像信号处理方法及FPGA，包 括：步骤一、计算重构矩阵；步骤二、重构方位向 多通道数据，包括：步骤2 .1、对各个通道的回波 数据沿方位向分别间隔补零，并进行方位向傅里 叶变换；步骤2 .2、将方位向傅里叶变换之后各个 通道方位向相同位置的点组合为一个向量并与 重构矩阵相乘，得到重构完成的方位向数据；(An azimuth multichannel FMCW based on FPGA FMCW SAR real-time imaging signal processing method and FPGA, package Including: Step 1: calculate the reconstruction matrix; step 2: reconstruct the orientation Multichannel data, including: step 2.1, echo of each channel The data is compensated with zero along the azimuth direction respectively, and the azimuth Fourier is carried out Step 2.2, after the azimuth Fourier transform The points of the same position in the channel azimuth are combined into a vector and are connected withThe reconstruction matrix is multiplied to get the reconstructed azimuth data Step 2.3. Repeat step 2.3 for the data of different distance gates)

一种压缩感知信号恢复算法，针对贪婪迭代类算法中的正交匹配追踪（OMP)算法的改进。OMP在每次迭代过程中选择出的原子并不是最优的，无法使本轮迭代中残差的减少最大化。本例程实现了改进的最优OMP算法，即Optimised_OMP，保证每次迭代选出的原子与已选出的原子序列所构成的平面正交，因而可以使残差下降的更快，从而加速算法收敛。(A compressed sensing signal recovery algorithms track (OMP) algorithm and orthogonal matching algorithm greedy iterative class. The OMP selected atoms in each iteration of the process is not optimal, not be able to maximize the reduction of the residual in the current round of iteration. The routines to achieve the optimal OMP algorithm improvements that Optimised_OMP, to ensure that each iteration selected atoms with atomic sequence elected a plane orthogonal, and thus can make the residuals have declined even faster, thus speeding up the algorithm convergence.)

利用stm32F407实现的等精度测频，可以精确测量频率，误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)