电梯控制器程序设计与仿真的vhdl源代码

用于modelsim仿真的xilinxfpga平台IP库，以ise 13.x为基础制作，在modelsim10下验证通过。(xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.)

a、设计可显示横彩条和纵彩条的VGA彩条信号； b、设计可显示英语字母的VGA彩条信号； c、设计可显示移动彩色斑点的VGA彩条信号； d、设计可实现手动切换a、b、c三个功能.(The design can display VGA color color and color of the longitudinal cross signal. The design can display the VGA color signal of the English alphabet. The design can display the VGA color signal of mobile color spots.)

说明：  本光盘是《数字信号处理FPGA实现》一书的配书光盘，内容包括了书中第二章给出的所有示例以及该书的12个实验完整的工程文件。 本光盘根目录下有3个文件夹，分别为dsp48_application,dsp48e_application和DSP_Example。(This CD-ROM is the CD-ROM of the book "FPGA implementation of digital signal processing". It includes all the examples given in Chapter 2 and the complete engineering documents of 12 experiments in the book. There are three folders in the root directory of this CD-ROM, which are dsp48_ application,dsp48e_ Application and DSP_ Example.)

VHDL语言，实现穿行数据接收的功能，将异步串口的数据转换为八位数据存储。

说明：  OFDM载波同步，Verilog编写，完全正确！！！(verilog )

基于FPGA的Verilog语言的智能小车，已经经过测试。(FPGA-based smart car Verilog language, and has been tested.)

user guide for teal and truss for system verilog

说明：  fpga实现相关滤波算法中的CSK算法，采用仿真的方式验证结果 fpga是xilinx 仿真工具是vivado2018.2 语言是verilog(The CSK algorithm is implemented in FPGA, and the results are verified by simulation FPGA is Xilinx The simulation tool is vivado 2018.2 Language is Verilog)

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

内置自修复分析仪