本文介绍了使用verilog语言进行硬件设计的一些基本技巧

异步的fifo,写时钟和读时钟相互独立，能够对数据进行缓存处理。希望对大家有用(Asynchronous fifo, write clock and the read clock independent of each other, capable of processing the data cache. I hope useful)

使用verliog设计实现LUT查找表乘法器，通过modelsim仿真验证通过(Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim)

用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错，然后将其纠错译码并输出，详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)

I2C接口标准建模源码,I2C interface standard modeling source-I2C interface standard modeling source

CAN VHDL Code. Behavioral implementation of CAN bus interface.

Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL

实现I2C协议下EEPROM存储的数据读写控制(Under I2C protocol to achieve read and write data stored in EEPROM control)

关于vhdl对硬件接口8237的编程，可以在进行fpga/cpld设计是作为模块用到-VHDL for the hardware interface on the 8237 programming, you can carrying out fpga/cpld design is used as a module

实现简单自动售货机的基本功能。投币找零功能，并用Led数码管显示，输出结果用Led显示。(Basic functions simple vending machines. Coin change for function and use Led digital tube display, the output display Led.)

实现按键控制AD三通道的电源转换的功能。(AD three buttons control channel to achieve power conversion)