VHDL源代码包

基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。(FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.)

多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)

说明：  文档科斯塔斯环路滤波器。。。。。般若撒根本(wendangsafwrfgvearbeabf)

实现了lcd1602显示的功能，可以在lcd上显示“年”字，有利于初学者学习lcd在fpga上显示，采用文本编辑的，利用quartus ii 702-Achieved lcd1602 display function, you can lcd display " " The word will help beginners learn lcd display in the fpga, using a text editor, using quartus ii 702

FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.

The term web server can refer to either the hardware (the computer) or the software (the computer application) that helps to deliver web content that can be accessed through the Internet.(web server)

说明：  基于HSPICE实现的反相器链，并分析电路延时(Inverter chain based on HSPICE, and analyze circuit delay)

说明：  并行读写14路串口数据，数据被写入FIFO，在收到读写信号后，SPI发送数据出去(Parallel read and write 14 serial port data, SPI send data)

vhdl测试程序，用于初雪者熟悉hdl的具体语法应用。比较简单了。(VHDL test procedure for the First Snow hdl who are familiar with the application of specific syntax. A relatively simple.)

logic lock 的vhdl源码，altera平台适用。-logic lock the VHDL source code, altera platform.