-
100_Power_Tips_for_FPGA_Designersi
fpga高手设计实战真经100则,最新的FPGA英文书籍,值得参考学习(100 Power Tips for FPGA Designers,The new FPGA English books, worth learning)
- 2013-12-06 19:40:43下载
- 积分:1
-
FPGA
zc706板子原理图,在使用板子时候可以参照设计,使用帮助巨大。(Zc706 board schematic diagram, when using the board can be reference to design, use the help.)
- 2016-01-13 22:00:05下载
- 积分:1
-
codeloc1k
说明: 实现电子密码锁的各项功能,经过编译和仿真(Electronic code lock of the function, the compiler and simulation)
- 2008-11-09 21:24:14下载
- 积分:1
-
mult3
this is the multiplier 3 module for the reed solomon encoder
- 2009-03-23 17:22:55下载
- 积分:1
-
irdecode
自己编写的红外解码子程序,但CPU资源占用较高,作教学示范用途。(prepared their infrared decoding routines, but higher occupancy CPU resources for teaching demonstration purposes.)
- 2006-11-05 13:51:28下载
- 积分:1
-
CORDIC FPGA使用Verilog程序实现
cordic的verilog程序
用FPGA实现-CORDIC FPGA using the Verilog procedures realize
- 2022-05-29 16:40:15下载
- 积分:1
-
Building and Using Counters - DE2-115
本练习的目的是构建和使用计数器。所设计的电路将在计算机上实现
- 2022-03-25 20:38:37下载
- 积分:1
-
piso8_ok_bingchuanzhuanhuan
本程序是用vhdl开发的实现并串转换功能的程序。(This procedure is developed using VHDL implementation and string conversion function of the program.)
- 2017-06-07 15:50:38下载
- 积分:1
-
一个可编程的间隔定时器的设计,8253要完成的功能,实…
设计一个可编程间隔定时器,完成8253的功能,实现以下几点要求:
1、 含有3个独立的16位计数器,能够进行3个16位的独立计数。
2、 每一种计数器具有六种工作模式。
3、 能进行二进制/十进制减法计数。
4、 可作定时器或计数器。
-The design of a programmable interval timer, 8253 to complete the function, realize the following requirements: 1, contains three independent 16-bit counter, capable of three independent 16-bit count. 2, each with six counter mode. 3, can be binary/decimal subtraction count. 4, can be used for the timer or counter.
- 2022-08-20 11:53:35下载
- 积分:1
-
一种基于FPGA的通用微处理器设计
一种基于FPGA的通用微处理器设计-A general-purpose FPGA-based microprocessor designs ....
- 2022-03-24 23:27:29下载
- 积分:1