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qiangda
基于FPGA的抢答器程序,VHDL 语言描述。(FPGA)
- 2010-11-06 11:13:17下载
- 积分:1
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基于VHDL+FPGA的DDS信号发生设计,已经通过调式
基于VHDL+FPGA的DDS信号发生设计,已经通过调式-Based on VHDL+ FPGA design of the DDS signal has been through mode
- 2022-06-28 11:38:23下载
- 积分:1
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yinpin_display0925
实现音频的I2S通信,音频柱的显示,及其噪声的处理等功能(Realization of audio I2S communications, audio column display, and its noise processing, and other functions)
- 2016-01-07 10:08:31下载
- 积分:1
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VHDL小程序(本人的一些小成绩哦,希望对大家有帮助)
VHDL小程序(本人的一些小成绩哦,希望对大家有帮助)-VHDL small programs (some of my small achievements Oh, we want to help)
- 2022-03-03 18:24:48下载
- 积分:1
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XADC
xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)
- 2021-03-29 15:19:10下载
- 积分:1
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fft1024
1024点fft verilog hdl(1024-point fft verilog hdl)
- 2020-09-08 20:28:02下载
- 积分:1
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ManchesterCode
改程序将实现对两个信号的曼切斯特编码,以用仿真软件验证过了(Reform program will achieve two Manchester encoded signal to a validated using simulation software)
- 2014-12-14 15:44:57下载
- 积分:1
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Slave-FIFO
详细讲解Slave FIFO模式下的初始化设置和相对应寄存器说明(Explain in detail the initial setup Slave FIFO mode and the corresponding register description)
- 2014-03-18 17:33:23下载
- 积分:1
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ds18b20_verilgo
艾米电子的verilog HDL描述的DS18B20的程序(Amy verilog HDL description of the procedures DS18B20)
- 2010-10-26 11:25:18下载
- 积分:1
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Micron_SDRAM_DDR2Simulation_model_Verilog
DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme(DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.)
- 2020-10-29 17:49:57下载
- 积分:1