VHDL常用源程序，希望以EDA技术学习者有用！

资源描述该乘法器可用于过滤器，算术运算和；

vhdl经典源代码――键盘接口设计，入门者必须掌握-vhdl classical source code-- the keyboard interface design, beginners must master

429总线通过FPGA直接实现发送程序,通过Verilog实现(send 429 message by Verilog and FPGA )

very much verilog code for the beginner

大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值-Datang Telecom

ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.

ccd驱动程序,刺程序是tcd1209的驱动程序，能够修改积分时间(ccd driver stabbed program is tcd1209 driver can modify the integration time)

I2C总线协议 Verilog源代码.试过，没有错误！可以直接使用(I2C bus protocol Verilog source code. Tried, no errors! Can be used directly)

Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.

csapp 第二版 体系结构实验 答案 第三个部分能跑58分(the second edition csapp architecture experiment the third part of the answer can run 58 minutes)