VHDL常用源程序，希望以EDA技术学习者有用！

用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)

one of example about hardware design language

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

该程序是一个可完成订制化的SPI双向总线接口，时钟相位、极性，以及分频比全部可通过寄存器进行配置，已经在ISE下通过综合，占用资源少，强烈推荐 (The program is a complete custom of SPI bidirectional bus interface, clock phase, polarity, and the divider ratio can all be configured through the register, has been in the ISE through an integrated, small footprint, it is strongly recommended)

altera mvb fpga sopc 设计参考文档，有一定价值(mvb fpga sopc Design scheme)

Altera DE0-Nano 开发平台SOPC可编程片上系统实现官方Demo。(Altera DE0-Nano development platform the SOPC programmable on-chip system Official Demo.)

开发工具是quartus II 7.0以上版本，这是一个verilog语言的分频器设计，个人作业设计，供参考学习(verilog，quartus II 7.0)

说明：  图像采集 VGA输出 图像的边缘 ov7670(V image acquisition VGA output image edge)

uboot i2c driver code for arm a5 dual core cpu imapx820, which is an soc of infotmic.

dsp与fpga通信的verilog程序，强烈推荐欢迎参考(dsp and fpga verilog communication program, it is strongly recommended to welcome reference)