Combination of shots, quartus2 with the ModelSim FBI put together a detailed ste...

Wimax矩阵的LDPC编码器，已通过modelsim仿真测试，并前在altera的FPGA板上通过测试,码率5/6，可进入代码内部修改参数，支持2/3,3/4其他2个码率，数据吞吐量为700M(Wimax based LDPC encoder, modelsim simulation passed, also passed on altera FPGA board, code rate 5/6, also support 2/3,3/4, throughout 700m)

用来检查FPGA通过PHY发送数据时是否有掉帧的现象(FPGA is used to check whether the PHY sends the data out of the frame with the phenomenon of)

基于altera公司MAX10型FPGA的ADC调试程序(ADC-based debugger altera company MAX 10 type of FPGA)

基于FPGA的双通道旋转变压器测角系统硬件设计，分析的比较清楚。(FPGA based dual channel rotary transformer angle measurement system hardware design, analysis of the relatively clear.)

LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_ARITH.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL

16X2液晶显示屏的FPGA显示驱动设计。-16x2 LCD display driver design of the FPGA.

一个4*4矩阵键盘的VERILOG接口程序设计（FPGA）-A 4* 4 matrix keyboard interface program Verilog Design (FPGA)

this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used. -this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used.

基于FPGA编写一个时间显示，计数功能，年月显示的程序，(FPGA-based preparation of a time display, counting, years show program,)

The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen