基于FPGA的多功能电子时钟的设计很经典的哦

FPGA将从CY7C68013读到的数写入SRAM-FPGA will read a few CY7C68013 write SRAM

基于FPGA的超声波测距，通过数码管显示距离(FPGA-based ultrasonic distance)

串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)

基于EDA技术设计4位十进制数字频率计的系统方案-Based on EDA technology design four decimal system solutions Cymometer

You well get all details about project and microcontroller

由Verilog编写在FPGA实现sobel算法应用于图像边缘检测，工程文件可在quartus13.1以上版本打开；工程使用到ram、fifo、pll三种ip核，design文件夹下包含ram、fifo、vga控制以及串口收发和sobel算法模块，sim和doc文件夹下分别包含modelsim的仿真模块和仿真结果；测试时将200*200分辨率的图片用matlab文件夹下的matlab脚本压缩、二值化，再将生成文件中数据用串口发给FPGA，边缘检测结果会通过VGA输出。(Written by Verilog in the FPGA implementation sobel algorithm applied to the edge detection of the image, the project file can be opened in the quartus13.1 or later project use ram, fifo, pll three ip kernel, design folder contains ram, fifo, vga control and Serial port transceiver and sobel algorithm module, sim and doc folder, respectively, include modelsim simulation module and simulation results test will be 200* 200 resolution picture matlab folder under the matlab script compression, binarization, and then generated Data in the file with the serial port to the FPGA, edge detection results will be output through the VGA.)

VHDL 的100例程代码，能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)

设计的结构是纹波进位加法器架构，但执行的操作是32位加法和32位减法

这是我用vhdl语言，在fpga内部做了一个双口ram的程序。我的邮箱：wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com

Verilog 语言写的控制 DAC8568 的模块，DAC8568 是SPI接口。(Verilog language used to write the control module DAC8568, DAC8568 is SPI interface.)