本实验教程选用Xilinx公司的产品X9572，与之配套的开发软件为ISE4.1i，可进行原理图的输入和VHDL硬件描述语言的输入，并且可利用Modelsim进

VESA CVT视频参数计算器，输入分辨率和刷新率即可得到需要参数。(VGA Timing Calculator)

H.265的FPGA实现！！使用Verilog语言开发。(H.265 FPGA implementation! Developed using Verilog language.)

读取AD7895 的12位ADC转换值，连续读取方式，采样速率为20mS 一次。(Read the 12 bit ADC conversion value of AD7895.)

USB Blaster full production data

TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)

actel flash rom使用 actel flash rom使用(actel flash rom actel flash rom)

FFT的VHDL源代码-fft vhdl source code

此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现. 将整个电路分为两个子模块，一个提供同步信号（H_SYNC和V_SYNC）及像素位置信息；另一个接收像素位置信息，并输出颜色信号。这样便于进行图形修改，同时也容易实现- This design uses Verilog the HDL hardware language design, realizes on the palm space development board Divides into two stature modules the entire electric circuit, provides the synchronized signal (H_SYNC and V_SYNC) and the picture element positional information; Another receive picture element positional information, and output color signal. Like this is advantageous for carries on the graph to revise, simultaneously is also easy to realize

spi通用串行总线，4线控制，可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)

基于FPGA的Mcbsp通信源码，经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)