康塔多0至999的VHDL接口7段显示

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

HARIS角点检测Harris角点检测HARRIS CORENR探测器

上传的是基于Xilinx的新出的开发板Zedboard的一个简单的知道文档，希望对有关同学有所帮助。(Uploaded a simple know the document based on Xilinx' s new development board Zedboard the hope that some of the students to help.)

基于FPGA与LM4550B的AC97软声卡VHDL语言驱动，版本2.0-FPGA-based soft and LM4550B the AC97 sound card driver VHDL language, version 2.0

基于用户自定义模块的实时时钟的设计；Qsys硬件设计；(Custom real-time clock module-based design Qsys hardware design )

数字式移相信号发生器可以产生预置频率的正弦信号，也可产生预置相位差的两路同频正弦信号，并能显示预置频率或相位差值；-digital phase shifting generator can produce preset frequency sinusoidal signal, Preferences may also have phase difference with the way the two-frequency sinusoidal signal, and can show that the preset frequency or phase difference value;

FPGA驱动VGA接口显示字符 -FPGA-driven interface VGA display characters

VHDL book for reference

说明：  verilog 版本，Xilinx玩转USB3.0，LVDS接口(verilog version,Xilinxplay with USB3.0,LVDS)

4b5b编码器实现，初学者资源，简单的逻辑电路实现(4b5b encoder implementation, resources for beginners)