康塔多0至999的VHDL接口7段显示

4*4键盘小程序 两种算法内附检查LED(4* 4 keyboard applet containing two algorithms check the LED)

说明：  there's a clock divider for DE2 altra board clock (50MHz)

Verilog的应用例程，包含了基本的硬件编程，加法器，触发器(Application of Verilog routines, including the basic hardware programming, adders, flip-flop)

说明：  基于FPGA设计的一段测试VGA接口的VHDL小程序\功能为在显示器上间隔显示横条、竖条以及棋盘格等彩条信号，希望对初学FPGA驱动VGA接口的电子爱好者有用(FPGA-based design of a VGA interface VHDL test applet \ functions for the intervals shown in the display bar, vertical bars and checkerboard patterns and other signals of color, hope for beginners FPGA VGA interface driver useful for electronic enthusiasts)

从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

ahb to apb master verification

This is the update firmware for CVFX-C02, 7" motorized touch screen car dvd player gps

GPS接收机相关器中关于积分清零模块、历元计数模块、时钟模块、以及整个相关器(accumulator、epoch counter、time base、gps baseband)

these files are written in verilog but i am uploading in text format

用Verilog编写ad_9866的相应程序，在FPGA上实现相应功能(The corresponding program of ad_9866 is written with Verilog, and the corresponding functions are realized on the FPGA.)