SELF CHECKING DUAL PORT RAM

平行 CRC verilog生成器已经被写在 c + + 生成一个并行CRC verilog 代码，对于给定的用户定义的数据宽度和 CRC 多项式。这是从 outputlogic.com。这直接执行算法应用于该网站。

在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)

交通灯的控制，分主干道和从路交通灯，主路优先，正常情况下，绿灯60s，红灯30S，黄灯5S(Traffic light control)

Fast Fourier Transform (FFT) 32K Point Design contains information about the design example

主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动，SRAM型号为IS61LV25616，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图(Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for quartusII 7.0, for a project, can be downloaded directly to the FPGA, including circuit diagrams)

说明：  FPGA接收串口UART发来的指令设定温度报警值，实时采集DS18B20温度传感器并显示，带报警功能(FPGA receives the instruction from UART, sets the temperature alarm value, collects and displays DS18B20 temperature sensor in real time, with alarm function)

MIPS 处理器程序，出自于《CMOS VLSI Design and Systems Perspective》书中。可以实现LB、SB、RTYPE、BEQ、J指令，仿真测试可以用。

这是一个USB弹跳Altera de2-115板球和VGA驱动程序源代码。请注意，这是在它是100%兼容SystemVerilog语言Verilog（IE可以重命名文件。V和它仍然有效）。我建议使用DE2板的编制是什么我使用。一个弹跳球测试图像来验证驱动器工作正常，如果你没有看到在启动时的橙色球作为一种诊断你的VGA连接不正确安装。

这是波发生器的顶层。它直接实例化 I/O 垫和实现设计所需的所有子模块。

In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.