SELF CHECKING DUAL PORT RAM

基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

fpga读取sd卡内容并且通过vga接口在显示器上显示图片(fpga read sd card contents and by vga interface to display pictures on the monitor)

An FPGA Implementation of a HoG-based Object Detection Processor

这包括地址数据总线 （ad 总线） 的 verilog 代码为一个 cpu。地址数据位为 16 位。

在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA )

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

本源码是用Verilog编写的12位移位相加乘法器的设计源码，开发软件为MAX+PLUS，已经测试通过。(The Verilog source code is written in the sum of 12-bit shift multiplier design source code, developing software for the MAX+ PLUS, has been tested.)

说明：  quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)

说明：  led学习控制l44444444444444(led verilog led ccccccc)

PLL中的TDC和DCO代码,是TI公司团队的，相当经典的代码，非常不错(the code of TDC and DCO)