Altera公司的NIOSⅡ处理器，VHDL语言编译，然后在C语言下的nios……

基于Xilinx公司的ISE软件开发的智能循迹避障小车的源代码，用Verilog语言，传感器有红外传感器以及超声波传感器(Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors)

VGA interface using Spartan3E board from DIGILENT.Labview .vi

sequenceur,该模块的主要功能是，控制器，在基本的risc架构中，实现各个模块的控制-sequenceur，control

DCT and Idct with vhdl and verilog

实现pwm波的输出，按键可调占空比的，可通过连接pwm输出值led灯以检测占空比的变化(To realize the output of the PWM wave, key adjustable duty ratio, but through the connection PWM output value led lamp with testing duty ratio changes )

基于FPGA的成型滤波器的代码，里面内附激励文件，使用verilog编写(FPGA-based shaping filter code, which included incentives files using verilog write)

VHDL code for converting BCD to Decimal

四选一编程语言，可以自动生成四选一器件。-First elected four programming languages, you can automatically generate a four selected devices.

The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.

RGB 与YCbCr 颜色空间可以相互转化(RGB and YCbCr color space can be transformed into each other)