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UBlaster
USB Blaster full production data
- 2011-06-17 16:03:28下载
- 积分:1
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RS2
该源代码是RS(31,19)码的完整编译码程序,采用的是VerilogHDL语言,包含了RS码的编码和译码,这蛋疼的东西花费好多时间(The source code is RS (31,19) code complete encoding and decoding procedures, and spend a lot of time using is VerilogHDL language contains the encoding and decoding of RS codes, this egg pain)
- 2012-09-09 13:04:41下载
- 积分:1
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用eda做循环彩灯
这是我们eda的课程大作业,用quartus仿真循环彩灯并下到板子里能完美的运行出四种波形。工程比较完整,希望对大家有帮助。
- 2023-05-23 10:45:04下载
- 积分:1
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FPGA simulation examples, Verilog coding, the process in detail, code easy to un...
FPGA的仿真实例,Verilog代码编写,过程详尽,代码易懂。第三个文档-FPGA simulation examples, Verilog coding, the process in detail, code easy to understand. The third document
- 2022-07-20 20:59:55下载
- 积分:1
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用VHDL语言仿真音乐设计
用VHDL语言仿真音乐设计
用VHDL语言仿真音乐设计
用VHDL语言仿真音乐设计-Simulation using VHDL language music design music design simulation VHDL language
- 2022-06-30 21:47:10下载
- 积分:1
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cordic_dds
采用CORDIC算法的直接数字频率合成器的设计(CORDIC algorithm uses direct digital frequency synthesizer design)
- 2015-08-18 16:15:17下载
- 积分:1
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prtsc
Program for simulate a prtsc
- 2015-09-29 21:54:37下载
- 积分:1
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modelsim设计的可调占空比的方波程式
modelsim设计的可调占空比的方波程式-modelsim designed adjustable duty cycle of the square wave program
- 2022-09-02 05:05:03下载
- 积分:1
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pipeline_booth_mult_16
用流水线的方法实现16位乘法器,运算速度快,消耗时钟资源少(Pipeline method to realize 16-bit multiplier, which is fast in operation and consumes less clock resources)
- 2020-09-29 18:17:44下载
- 积分:1
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FPGA
一种基于FPGA的CPU设计-FPGA-based CPU design ........
- 2022-01-25 14:34:00下载
- 积分:1