FPGA simulation examples, Verilog coding, the process in detail, code easy to un...

16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL

出租车自动计费系统的verilog程序代码(Taxi automated billing system verilog code)

用VHDL语言设计篮球24秒可控计时器功能说明：1.具有24秒计时、显示功能；              2.设置外部按键，完成清零、暂停、恢复控制；              3.24秒倒计时，时间间隔为1s；               4.时间到后发出报警信号，并在3s后解除。

pcf8563，在quartusII下VERILOG编写的数字时钟程序，8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)

将Verilog代码转换成C++代码的软件，C源代码。-soft for changing Verilog code to c++ code ,c code

tms320c6747的测试程序 。用于dsp各个模块的测试，很好的例子(dsp tms320c6747)

    本资源详细的设计了一个FIFO的用法，将数据从ROM中读取送到FIFO缓存中然后RAM从FIFO缓存中读取数据存到内存中，改程序可以很好的学习三者之间的关系

FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)

8051的Verilog-Verilog OF 8051

Conduct a digital system ( electronic lock ) using hierarchic methodology . An electronic lock is a device that allows access or opening of a system , as long as the key or combination to enter match with which it is predefined in said lock .