通过VHDL语言的例子，通过乒乓球运动FPGA原型楚原型（1章）

说明：  内部含3个模块，使用DDS产生200k与500k的正弦波，两者相加后过数字低通滤波（通带0-200k，阻带400k以上），并将波形输出，实测FFT分析中看不到500k分量。其中数字滤波器采用MATLAB设计（FIR+等波纹，阻带衰减-80dB）(There are three modules in the system. DDS is used to generate 200K and 500K sine waves. After adding the two modules, the digital low-pass filter (passband 0-200k, stopband above 400k) is used, and the waveform is output. 500K component can not be seen in the actual FFT analysis. The digital filter is designed by MATLAB (FIR + equal ripple, stopband attenuation - 80dB))

出租车计费，器设计一个出租车自动计费器，计费包括起步价、行车里程计费、停止和暂停不计费三部分。现场模拟汽车的启动、停止、暂停和换挡状态。分别用四位数码管显示金额和里程，各有两位小数，行程 3公里内，起步费为6元，超过3公里，以每公里1.3元计费(Car repair billing device)

原创，帧同步器的Verilog代码，在FPGA上验证实现过，无误。作为通信系统帧传输的仿真，有限状态机同步态和失步态的切换仿真。(Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine synchronous state and the loss of the switching simulation of gait.)

turbo码的编码程序,verilog HDL,在ISE环境中(turbo code encoding process)

在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)

About 1588 PTP protocol xillinx FPGA running code and Software application, and to introduce documents, want to help everyone

说明：  In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.

这个是用VHDL实现的正负脉宽调制器，同样是对新手有帮助，高手不必看了。-This is achieved using VHDL positive and negative pulse width modulator, the same is to help novice, you do not have to read. Ha ha

将VHDL程序下载到DE2开发板，引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)

给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)