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基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

VHDL黄金版，本人费了九牛才找到，帮助初学者入门-VHDL version, I spent nine cattle to find help beginners entry

vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信(vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP)

此代码是用于旋转一个步进电机所需的方向。

AHBtoAPB设计基于AMBA总线协议的APB Bridge设计(AHB to APB designThe AHB to APB bridge interface is an AHB slave. When accessed (in normal operation or system test) it initiates an access to the APB.)

PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code

《Verilog HDL 程序设计教程》7-"Verilog HDL Design Guide," 7

此代码实现4人表决功能，4人中有三人同意即为通过。(Four voting)

传感信号无线数字传输系统的设计与实现.kdh(err)

用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.