标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像增强处理,平滑,锐化,滤波(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image enhancement, smoothing, sharpening, filtering)

硬件描述语言VHDL的频率计程序,可用于做实验,或者初学者借鉴.-Hardware Description Language VHDL of the frequency counter program can be used for experiments, or the beginners learn.

串并转换程序，由串行输出转换为4位的并行输出-String and the conversion process, from the serial output is converted to 4-bit parallel output

编程规范是重中之重，带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)

verilog语言实现一个CPU，汇编程序实现汉明编码功能，输入11位代码，输出15位编码结果。(Verilog language to achieve a CPU, assembler to achieve Hamming coding function, enter 11 bit code, output 15 bit encoding results.)

简要地说明时序约束的内容，对入门级的朋友相当起到引导的作用(Briefly describes the content of timing constraints on entry-level friends rather play a guiding role)

温度码到二进制吗的转换的ｖｅｒｉｌｏｇＨＤＬ代码。-Temperature code to do the conversion of binary code verilogHDL.

VHDL 的100例程代码，能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)

比较适合初学学者，而且比较基础。描述的不全面，先看看吧-it‘s best book for beginner！

Verilog，编写的udp收发程序，开发环境xilinx(Verilog, written UDP transceiver)