VHDL4人抢答器

64点FFT代码 基4算法 Verilog(64-point FFT code radix-4 algorithm Verilog)

针对Altera的DE2/ DE1交互板的音频核心的音频编解码器（编码器/解码器），并提供了音频输入和输出的接口。(The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and output.)

Coding Styles for if Statements and case Statements

包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程(Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project)

这是一个简单的定时器模块使用计数器

用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.

一篇关于多相滤波器的论文,讲解了关于多信道的实现与仿真。(A paper about the polyphase filter，explained about the realization of multi-channel and simulation )

TEXIO study testbench passed VHDL FPGA CPLD simulation Altera quartus

这也是VHDL语言编写的一个小程序，对于VHDL入门很有帮助~~(This is a small program VHDL language, VHDL entry-helpful ~ ~)

Huffman encoder decoder verilog