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LS165
LS165移位寄存器的verilog语言编写(The writing of the Verilog language of LS165 shift register)
- 2020-11-22 22:59:34下载
- 积分:1
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2位并行加法器初学者必看初步了解FPGA
2位并行加法器初学者必看初步了解FPGA-two count
- 2023-07-28 14:05:03下载
- 积分:1
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HB1
半带滤波器,用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)
- 2020-12-23 10:29:06下载
- 积分:1
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dianzhen
如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分:1
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FM_T
一个简单的FM调制模块,FM发射,用Verilog编写,基于Xilinx SPARTAN6 XC6LX9开发(A simple FM modulation modules for FM transmitter, using Verilog prepared, based on XILINX SPARTAN6 XC6LX9 Development)
- 2020-11-25 20:19:32下载
- 积分:1
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qam_64
64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核(64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS)
- 2021-03-02 23:29:33下载
- 积分:1
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fpga clock design, the information is better, for your reference, non
fpga clock 设计,资料较好,供大家参考,非商用目的哦-fpga clock design, the information is better, for your reference, non-commercial purposes Oh
- 2022-10-20 15:50:02下载
- 积分:1
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4x4-Keypad
fpga的一个小程序用于3s500e 4*4键盘模块(fpga is a small program used 3s500e 4* 4 keyboard module)
- 2013-07-21 11:41:36下载
- 积分:1
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ahb_master_latest.tar
AHB master总线verilog实现(Implementation of AHB master bus Verilog)
- 2020-07-01 22:20:02下载
- 积分:1
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4-code
设计一个十进制计数器,具有显示位置随计数时钟在八个数码管中左右滚动的功能。(Design of a decimal counter, a display position with the count clock in at around eight digital scrolling function.)
- 2016-05-24 17:00:31下载
- 积分:1