该项目是用于执行4位arethmatic操作和逻辑操作…

VHDL学习手册-VHDL study manual

用Verilog代码实现的乒乓操作，用Verilog代码实现的乒乓操作(Verilog pingpong)

利用最新的嵌入式开发工具EDK，在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程，从而在FPGA 中实现U S B 控制器， 并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。(Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.)

TCD1209D驱动程序 Verilog语言(TCD1209D driver Verilog language)

使用vhdl语言在altera公司的up3板上产生vga信号，里面有详细的解析和说明，是一个很好的教程。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide.

v6 1x 3.125G rapidio协议工程代码(xilinx v6 rapidio data transmission protocol Practical project application engineering code)

Arbiter code for simulation purpose

四位动态数码管显示数字时钟的分位和秒位。工具：Quartus ii 6.0 语言：VHDL-4 shows the number of dynamic digital tube digital clock and seconds bit. Tools: Quartus ii 6.0 Language: VHDL

wishbone接口的设计，在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)

控制AD采样的程序,希望对大家能有所帮助!不对之处请多多指导!-I think it is a goog pragram ,I hope it is good for you !