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10_ImageEdge
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction)
- 2020-10-23 20:27:22下载
- 积分:1
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Exercise4
AES TSAPI Retrieve Event in Non-blocking Mode
- 2019-05-07 20:04:58下载
- 积分:1
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介绍VHDL编程的资料,很详细,值得收藏
介绍VHDL编程的资料,很详细,值得收藏-vhdl
- 2023-01-26 15:25:04下载
- 积分:1
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Xilinx ISE License
说明: Xilinx ISE License集合,包含Vivado、ise的破解license,安装ISE后loading license即可完成,最全的器件库(Xilinx ise license Collection, including Vivado and ISE cracking licenses. After ISE is installed, the loading license can be completed, which is the most complete device library.)
- 2021-01-19 23:28:43下载
- 积分:1
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3。这个核心的分配必须是免费的。充电
3. Distribution of this core must be free of charge. Charging is -- allowed only for value added services. Value added services -- would include copying fees, modifications, customizations, and -- inclusion in other products.-3. Distribution of this core must be free of charge. Charging is-- allowed only for value added services. Value added services-- would include copying fees, modifications, customizations, and-- inclusion in other products.
- 2022-01-31 13:42:46下载
- 积分:1
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vhdl抗抖动滤波器的设计,包括完整的工程
vhdl抗抖动滤波器的设计,包括完整的工程-VHDL anti-jitter filter design, including the complete works
- 2022-04-26 19:29:03下载
- 积分:1
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等精度测频率
利用stm32F407实现的等精度测频,可以精确测量频率,误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)
- 2020-06-19 13:00:02下载
- 积分:1
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2-ADC—单通道(DMA读取)
说明: STM32F103 ADC 通过DMA进行读取(STM32F103 ADC reads by DMA)
- 2020-08-20 15:36:26下载
- 积分:1
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tcp/ip master
tcp/ip master tcp/ip master tcp/ip master tcp/ip master tcp/ip master tcp/ip master
- 2023-07-08 00:40:03下载
- 积分:1
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FIRfilterverilogHDL
FIR滤波器的verilog HDL代码示例,以16阶为例(Verilog HDL code for fir filter)
- 2015-07-08 17:05:38下载
- 积分:1