用VHDL写的

8051的内核(vhdl) This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.-8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.

Xilinx ISE 9.2 and ChinpScope Pro 9.2 Sn

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)

应用背景通用模块，以产生可重构的源时钟频率的传输速率。该模块可用于UART，自定义串口协议等。提供一个时钟发生器模块产生可选 ；-波特利率和；——时钟源（可选择分因素） ；还产生接收 ；——时钟的16倍，8倍，倍，倍的传输波特率 ；关键技术UART，VHDL，FPGA，CPLD programmanle逻辑器件。设备无关的代码

VHDL语言实现摄像头的捕捉和采集,通过仿真验证，很好哈-vidicon s catch and collection in VHDL

光纤发送接收模块，verilog编写，主要用于光纤的发送和接收，波长1310nm(Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm)

这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家-This is a keyboard based on the VHDL programming language source code program, the desire to help everyone

基于FPGA的频率测量，能测量方波信号的频率、占空比、相位差。范围100mHz~200MHz，精度0.0001Hz(The frequency measurement based on FPGA can measure the frequency, duty cycle and phase difference of the square wave signal. Range 100mHz~200MHz, precision 0.0001Hz)

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