Using dual

用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine.

由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)

1、FSMC全称是静态存储控制器，用来高速操作外部SRAM，NOR，NAND等，广泛用来驱动LCD MCU的FSMC配置在fsmc_nor.c，你也可以查阅相关资料。 2、此例程通过读写外部M29W128，熟悉FSMC的配置以及操作。(1, FSMC stands for static memory controller for high-speed operation of external SRAM, NOR, NAND, widely used to drive the LCD MCU FSMC configuration in fsmc_nor.c, you can also access to relevant information. This routine by reading and writing external M29W128 familiar with the configuration and the operation of the FSMC.)

this is a Multiplier and Accumulate (MAC). written in VHDL

fir滤波器，Verilog语言写的，容易看懂-fir filter, Verilog language written in easy to understand

VHDL设计实体的基本结构 VHDL的语言要素 用VHDL实现电路设计的方法 VHDL设计流程-VHDL design entities, the basic structure of the language element of VHDL using VHDL circuit design approach to achieve VHDL design flow

it is used to compile codec

8 bit cpu vhdl design code not tested

说明：  802.16d 的卷积编码和解码的VHDL实现(802.16d cc encoding and decoding,writing in VHDL)

一些简单的Verilog代码，小例程，比如求平均值、七段数码管等等(Some simple Verilog code, small routines, such as averaging, seven digital tubes and so on)