vhdl um teste com muita coisa interessante ae pra ver

NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.

fpga key test 入门 xilinx 黑金的板子(fpga key test xilinx)

isa总线接口，可以实现与isa总线　的IO和MEMERY接口(isa bus interface can be achieved with the isa bus IO interfaces and MEMERY)

酷睿系列流水灯通用程序，来回往返流水，点亮led(ledwater for ep2c8q208c8)

这份文献主要介绍了dsp builder 8.0的功能及使用手册，介绍了如何和matlab一起使用的步骤。(This literature focuses on the dsp builder 8.0 features and user manual describes how to matlab and used in conjunction with steps.)

本文介绍了汉明编码与译码通过FPGA器件来实现，介绍了使用VHDL语言编程的基本算法！-This article describes the Hamming encoding and decoding through the FPGA device to implement, introduced the use of VHDL programming language is the basic algorithm!

these are the source codes for the book " 100 power tips for FPGA designers"

完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents

axi_lite_user官方样例，精简功能，适用于zynq系列axi总线(Axi_lite_user official sample, streamline function, apply to zynq series Axi bus)

vhdl cpu芯片逻辑设计的一部分实现 只有一小部分 大家可以看一下 寄存器 加法器之类的(vhdl cpu chip logic design part of its implementation only a little part everry look and see b=about registers adder and so on)