设计采用Verilog HDL 16位CPU。

TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)

vhdl program of matlab file converted to vhdl

说明：  这是一个带声音的弹球小游戏，通过VGA口显示，通过扩展口JA的 pin4和 pin GND输出声音， BTN3 BTN2 控制挡板左右移动，弹球和挡板都自带动画效果(This is a band sound pinball game, through the VGA port shows that through the expansion of the mouth of the JA and pin4 output pin GND voice, BTN3 BTN2 control baffle around Mobile, pinball and baffle all bring their own animation effects)

Verilog使用automatic function的範例(Verilog example of the use of the automatic function)

freeDev数字应用开发板中的VGA控制器的IP核的verilog实现-freeDev digital application development board of the VGA controller IP core implementation of the verilog

VHDL实现 DDS。大家共享吧，一起学习，一起进步(VHDL realize DDS. U.S. to share it with learning, with progress)

四位密码锁，移位显示，可以设置和更改密码。-4 lock, shift, it can be set up and change your password.

有符号数的完整讲义和例子Verilog 2001(Signed Arithmetic in Verilog 2001, paper with examples)

32位bit输入的CRC32校验，verilog的代码，以及modelsim的testbench代码(The encode of CRC32 with 32bit-inputs based on verilog, and according encode of testbench)