登录
首页 » VHDL » ultractr源码,XPS技术,基于PPC平台

ultractr源码,XPS技术,基于PPC平台

于 2022-01-28 发布 文件大小:5.31 MB
0 109
下载积分: 2 下载次数: 1

代码说明:

ULTRACTR的源码,xps工程实现,基于PPC平台-ULTRACTR source code, xps engineering, based on the PPC platform

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • LCD12864(st7920)
    整理的网上关于LCD12864(ST7920控制器)的串并口程序,已在stc89c52rd+11.0592MHz的情况下测试通过(Finishing line on LCD12864 (ST7920 controller) serial and parallel programs, in the case of stc89c52rd+11.0592 MHz test)
    2020-09-13 08:48:00下载
    积分:1
  • 这是一个fft的IP核,安装要求为quartus6.0以上。解压安装后可在quartus里例化使用,元件主要为cyclone和stratix,最大支持1024点...
    这是一个fft的IP核,安装要求为quartus6.0以上。解压安装后可在quartus里例化使用,元件主要为cyclone和stratix,最大支持1024点的转换。
    2022-01-28 08:13:42下载
    积分:1
  • here is realized simple FIFO stack in vhdl. very simple example, but very help...
    here is realized simple FIFO stack in vhdl. very simple example, but very helpful.
    2022-03-12 07:44:59下载
    积分:1
  • VHDL language procedures, functions as follows: What is the keyboard input, in t...
    VHDL语言实现的程序,功能如下:在键盘上输入什么,在相应的LCD上显示你输入的字符-VHDL language procedures, functions as follows: What is the keyboard input, in the corresponding LCD display the characters you type
    2022-04-26 10:47:53下载
    积分:1
  • qpsk
    说明:  载波同步是QPSK信号相干解调的一项关键技术。(Carrier synchronization signal coherent QPSK demodulation is a key technology.)
    2008-10-07 10:12:23下载
    积分:1
  • RS
    说明:  本文设计了基于FPGA的,用verilog HDL语言描述的在伽罗华域GF( )上的RS(6,4)编码器。在ISE软件上用verilog HDL语言分别对每个模块进行描述,然后在软件上进行编译、仿真,最终实现RS(6,4)编码,下载之后用chipscope采集数据,分析符合仿真结果,达到设计的要求。(This paper is designed based on FPGA, described by Verilog HDL language in Galois field GF () on RS (6,4) encoder. Using the ISE software Verilog HDL language for each module is described, and then compile, simulation in software, the ultimate realization of the RS (6,4) encoding, after downloading by chipscope data acquisition, the analysis with the simulation results meet the design requirements.)
    2017-08-25 17:59:14下载
    积分:1
  • count16
    制作16位流水灯,实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)
    2020-06-24 01:20:02下载
    积分:1
  • Analog-Digital-Wandler
    关于逻辑信号的转变等等的一个程序。还包括显示(Analog-Digital-Wandler)
    2009-11-07 20:20:28下载
    积分:1
  • stbc空时编码源码,非常好的程序。verilog程序
    stbc空时编码源码,非常好的程序。verilog程序-STBC Space-Time Coding Source, very good program. Verilog program
    2022-03-04 18:24:10下载
    积分:1
  • this a fpga sparttan 3e based project in which i have made a game based on vg...
    this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the main file included in the project.-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the main file included in the project.
    2023-09-06 13:30:04下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载