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ABencode
FPGA实现增量式光栅尺正交脉冲解码,基于Verilog(FPGA realization of incremental grating ruler orthogonal pulse decoding, based on Verilog)
- 2020-11-21 20:59:36下载
- 积分:1
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24_Timer
说明: 使用Verilog编写的24位定时器,具有apb 总线接口,可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
- 2021-04-27 21:38:44下载
- 积分:1
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matlab程序
说明: OFDM信号的发送与接收 ,需要自取。时域图,模糊图,削峰。(Sending and receiving of OFDM signal)
- 2020-12-17 12:56:10下载
- 积分:1
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doorlock
基于FPGA设计的电子密码锁是一个小型的数字系统,与普通机械锁相比,具有许多独特的优点:保密性好,防盗性强,可以不用钥匙,记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages:good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)
- 2013-12-25 21:24:41下载
- 积分:1
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and they simply based on the mouse xinlinx ideally VHDL application procedures,...
基于fpga和xinlinx ise的鼠标应用vhdl程序,希望对你有所帮助!-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
- 2022-02-18 14:46:28下载
- 积分:1
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FPGA
说明: 基于FPGA的数字式相位测量仪的设计与制作(FPGA-Based Digital Phase Meter Design and Production)
- 2010-04-16 19:40:41下载
- 积分:1
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Clock_1602
基于FPGA的1602时钟显示,驱动1602显示时钟,矩阵键盘调时(1602 FPGA-based clock display, clock display driver 1602, when the transfer matrix keyboard)
- 2011-06-29 00:58:51下载
- 积分:1
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增强的音频工程
Enhanced Audio Project
by
Dixie Xue & Wei Zhang
-Enhanced Audio Project
by
Dixie Xue & Wei Zhang
- 2022-08-26 07:09:41下载
- 积分:1
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Fitz_algorithm
QPSK调制的载波频偏估计,是一个可以调用的函数。接收端进行了一系列的处理。经典的Fitz法(QPSK-carrier frequence offset estimation_ Fitz)
- 2013-03-18 14:37:56下载
- 积分:1
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median
说明: 用verilog编辑的中值滤波器!语言旁表有注释方便理解!(Using Verilog editor median filter! Language beside the table annotated to facilitate understanding!)
- 2008-11-03 09:21:18下载
- 积分:1