基于DE2-70开发板的VGA接口实现程序

a sequence generator

说明：  潘松那本书上用vhdl语言描述的16位并入并处加法器(Pan book vhdl language used to describe the 16-bit adder into his)

有关gal器件的编程入门，以及常见逻辑门、计数器VHDL程序(For gal device programming entry, as well as common logic gates, counters VHDL program)

说明：  基于FPGA，用verilog hdl语言实现串口收发实验(Based on FPGA, using Verilog HDL language to achieve serial port transceiver experiment)

a program which divides the clock by 3

基于verilog的LU分解,本文件包括详细的程序代码，运行文件，以及详细的文档(LU decompose based on verilog)

FPGA实现BPSK调制，带Modelsim仿真，实际系统测试通过，载波信号，调制波信号频率可调(FPGA implementation BPSK modulation with Modelsim simulation, the actual system test, the carrier signal, modulated wave signal frequency adjustable)

VHDL-2008 Just the New Stuff Peter J. Ashenden Consultant Ashenden Designs

this document used for how to get config and location information of PCI card

this is the vhdl code for the arithmetic logic unit.enjoy!