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LATTICE_ASYNFIFO
LATTICE FPGA FIFO 程序例程,工程详细,全部源代码上传 (LATTICE FPGA FIFO routine, detailed engineering, all source code uploaded)
- 2013-09-09 11:10:01下载
- 积分:1
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eluosi_game
这是一个基于NIOSII的俄罗斯方块游戏设计,是基于FPGA的,利用流模式DMA传输实现游戏。(This is a box based on the Russian NIOSII game design, is based on the FPGA, and the use of streaming mode DMA transfer realize the game.)
- 2007-09-29 23:52:25下载
- 积分:1
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MUX
Quartus环境下多路选择器的编写代码,适合初学数字逻辑设计的进行学习(MUX in Quartus)
- 2012-03-27 19:42:45下载
- 积分:1
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VHDL source VHDL source VHDL source
VHDL源码 VHDL源码 -VHDL source VHDL source VHDL source
- 2022-01-26 18:08:58下载
- 积分:1
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crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,
crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,-CRC check, certified correct, you can download directly, there are deficiencies can correct me,
- 2022-10-07 11:55:03下载
- 积分:1
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Robotics-Toolbox-For-Matlab.tar
机器人控制,用matlab robotics toolbox 仿真设计(robotics controll using matlab robotics toolbo simulation)
- 2012-11-27 14:18:41下载
- 积分:1
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c_fir_ppt
C语言写得FIR滤波器代码,简单实用,是学习滤波器设计的好材料,附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design
)
- 2020-07-04 03:00:02下载
- 积分:1
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Verilog 下脉冲发生器的源代码,可用于模拟三相交流电过零点,主要用于调试一些类似SVC(无功补偿)控制器的一些算法...
Verilog 下脉冲发生器的源代码,可用于模拟三相交流电过零点,主要用于调试一些类似SVC(无功补偿)控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) controller of a number of algorithms
- 2023-06-15 23:20:03下载
- 积分:1
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RTL8369-design-kit-v3_5
RTL8369开发资料,包括手册,图纸,Layout说明等等(RTL8369 development information, including manuals, drawings, Layout Guide.)
- 2014-12-07 13:04:30下载
- 积分:1
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TIMING LEARNING
TIMING LEARNING -TIMING LEARNING
- 2023-04-26 09:15:03下载
- 积分:1