M25P80 serial memory for applications Verilog program

4X4 KEYPAD 的输入位数计数器，可以自己定义输入的位数-4x4 KEYPAD median counter input, input their own definition of the median

由于在网上很难下载到EDA技术－窦衡的PPT，所以本人经过学习后做成word，供大家下载。只针对VHDL语言部分和所有的程序。-Because the Internet is difficult to download to EDA technology- Douheng of the PPT, so I made after learning after the word, for all to download. Only for part of the VHDL language and all the procedures.

用FPGA控制1602型液晶显示，显示一行英文语句。(show)

用verilog语言写的简单的键盘扫描代码，适合初学者，用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)

在FPGA开发平台上，通过按键控制一个弹球小游戏。输出VGA显示信号输送到显示器上显示(On the FPGA development platform button control of a pinball game. VGA output signal is supplied to the display displayed on the display)

该源码用vhdl语言制作了一个简单的交通灯，方便大家学习~~(The source vhdl language produced by a simple traffic light, facilitate learning ~ ~)

Xilinx 的DDR SDRAM控制器，用Verilog HDL描述- A DDR SDRAM contraller sample descripte in Verilog HDL ,base on Xilinx FPGA

pc104接口的verilog代码，仅供参考-pc104 verilog interface code for reference purposes only

产生svpwm波形，可以参考下载,以便学习交流(gennerate SVPWM wave)

VHDL 源码模块，可以实现最经典原PWM，可以用于电源，电机的控制()