A clock procedures, as well as stopwatch, I feel pretty good, there is a need to...

说明：  Matlab to hdl code for Least_square testbench

fpga VHDL语言，控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS

说明：  nios开发板电路图CycloneII_NiosII_2C35_Rev02_DB_SCH.zip(nios development board circuit CycloneII_NiosII_2C35_Rev02_DB_SCH.zip)

lacp代码，可以参照学习Lacp协议的相关状态机等知识(LACP code, can refer to the relevant state machine learning knowledge of Lacp protocol)

本文件是用CPLD（EPM7064）驱动线阵CCD（ILX509），其中包括原理图和程序-This document is a CPLD (EPM7064) driver line array CCD (ILX509), including schematics and procedures

Multisim11下8051跑马灯仿真。(The 8051 Marquee under Multisim11 simulation.)

基于CPLD器件的线型CCD东芝TCD1501的驱动程序，用verilog语言开发。(CPLD devices based on linear CCD driver Toshiba TCD1501 using Verilog language development.)

24位x24位的乘法器 十分详细24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器(24-bit x24-bit multiplier very detailed 24-bit x24-bit 24-bit x24-bit multiplier of the multiplier 24-bit x24-bit 24-bit x24-bit multiplier of the multiplier 24-bit x24-bit 24-bit x24-bit multiplier of the multiplication Explorer 24-bit x24 multiplier 24-bit x24-bit multiplier)

vs自定义插件开发,带卸载功能,经测试完全可用，分享给大家，可以学习！(vs custom plug-in development, with the uninstall feature, has been tested and is fully available for everyone to share, you can learn!)

对pci9054芯片的配置进行了设置，并对PCI9054的各状态机进行了设置，程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)