100个VHDL的例子

ofdm系统的matlab实现，包括插入导频信号和循环前缀(Matlab implementation of ofdm system, including inserted pilot frequency signal and the cyclic prefix)

A multiplier unit in VHDL

a big number class and a calculator using the class

PLL中的TDC和DCO代码,是TI公司团队的，相当经典的代码，非常不错(the code of TDC and DCO)

this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural -this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural

Browser modularization processing, browser modularization combing, browser modularization expansion

关于语音通信信道调制的程序代码，是论文的仿真程序(About voice communication channel modulation code, the authors of the paper simulation program)

说明：  数电实验FPGA verilog代码，包括秒表、全加器、半加器等。(FPGA Verilog code for digital experiment)

VGA显示接口的verilog控制程序。用于VGA显示器的控制驱动-VGA display interface Verilog control procedures. Control for VGA display driver

基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file)