使用硬件描述语言(VHDL)的实现或门

JOP的内核文件，这是核心的核心，中文资料基本找不到-JOP kernel, which is the core of the core, the Chinese can not find basic information

图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过(Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by)

对pci9054芯片的配置进行了设置，并对PCI9054的各状态机进行了设置，程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)

以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)

用FPGA实现的VGA接口程序，采用的语言是VHDL硬件描述语言，大家可以参照下看看采用的器件是Altera EP2c35-Using FPGA to achieve the VGA interface program, the language used is VHDL hardware description language, we can see under the light of the devices used are Altera EP2c35

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

vhdl 加法器 vhdl 加法器 vhdl 加法器-vhdl　adder vhdl　adder vhdl　adder

AES128 encription vhdl code

利用FPGA实现QPSK数字调制。编程采用Verilog HDL语言。(By using the FPGA realization of QPSK digital modulation. Use Verilog HDL language programming. )